High quality European GaN-wafer on SiC substrates for space applications
The development activities cover the entire value chain including crystal growth-, wafering-, epitaxial-, and device/component-related topics.
A quality feedback loop along the process chain will be established. Results therefore will be implemented into the continuous development process of the substrate quality improvement. The quality feedback loop is accompanied by benchmark activities which will be performed on substrate-, epi- and device level.
during the reporting period of the EuSiC project the re-launch of semi-insulating crystal growth and preparation process at SiCrystal was successfully accomplished.
within the first project year the fraction of high resistivity wafers in a crystal (> 1E5?cm) could be improved to a value significantly higher than 90%.
the achieved resistivity homogeneity on wafer level for material complying with the target specification of 1E10 ?cm is very good.
the Micropipe density (MPD) was evaluated using Normarski microscope. An automated inspection allows full area assessment and the calculation of a micropipe defect free area. More than 90% of the semi-insulating SiC wafer showed an averaged MPD of < 1/cm2.
for high MPD material there is a tendency to clustering of MPDs increasing the local MPD above 135/cm2 which is estimated to have significant negative impact on following epitaxial processes.
the data were qualitatively confirmed using optical surface inspection tool (Candela). Since etch pit caused by micropipes cannot be distinguished from etch pits attributed to dislocations the etching results were not suitable to detect micropipes on semi-insulating material.
subsequently a high-electron-mobility transistor (HEMT) structure consisting of an isolating (Al,Ga)N buffer, a 22 nm thick barrier layer with nominally 18% Aluminium and a 3 nm thick GaN cap has been grown by MOCVD (metal organic chemical vapour deposition) on the EuSiC-substrates. The epitaxial layers were characterised with respect to their electrical, morphological and structural properties and compared to semi-insulating 3-inch SiC benchmark substrates. The crystallographic quality and the surface morphology of such HEMT structures are very good as compared to the benchmark substrates.
X-ray rocking curves were performed to verify the quality of the grown HEMT structures. A significant shift of the AlN nucleation layer grown on EuSiC substrates in comparison to benchmark substrate was observed probably caused by different strain induced in the first steps of the epitaxy due to the higher roughness observed on EuSiC substrates. This modification of the strain should have an impact on the piezoelectric field leading to some difference in the carrier density, pinch-off voltage and sheet resistance of the HEMT structures. No shift of the AlN nucleation layer was observed after re-polishing of the EuSiC substrates.
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